Specification
Width15.24mm
Length51.75mm
HTS Code8542.31.00.01
Pin Count40
TechnologyCMOS
RAM (words)0
RoHS StatusRoHS Compliant
SubcategorySerial IO/Communication Controllers
JESD-30 CodeR-PDIP-T40
Boundary ScanNO
JESD-609 Codee0
Number of I/O2
Surface MountNO
Terminal FormTHROUGH-HOLE
Low Power ModeNO
Power Supplies3.3/5V
Supply Voltage5V
Terminal Pitch2.54mm
Clock Frequency24MHz
Terminal FinishTin/Lead (Sn/Pb)
Address Bus Width3
Temperature GradeCOMMERCIAL
Terminal PositionDUAL
Additional FeatureALSO OPERATES AT 2.97 V MINIMUM SUPPLY
Supply Current-Max3mA
Height Seated (Max)6.35mm
Qualification StatusNot Qualified
Number of Serial I/Os1
Communication ProtocolASYNC, BIT
Data Transfer Rate-Max0.1875 MBps
Number of Terminations40
External Data Bus Width8
Supply Voltage-Max (Vsup)5.5V
Supply Voltage-Min (Vsup)4.5V
Operating Temperature (Max)70°C
uPs/uCs/Peripheral ICs TypeSERIAL IO/COMMUNICATION CONTROLLER, SERIAL
Data Encoding/Decoding MethodNRZ
Peak Reflow Temperature (Cel)NOT SPECIFIED
Time@Peak Reflow Temperature-Max (s)NOT SPECIFIED
In Stock:
7563
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Associated Product
XC4VLX160-10FF1148C
Xilinx
FPGA Virtex-4 LX Family 152064 Cells 90nm (CMOS) Technology 1.2V 1148-Pin FCBGA
Xilinx
FPGA Virtex-4 LX Family 152064 Cells 90nm (CMOS) Technology 1.2V 1148-Pin FCBGA